Intel AU80586GE025D Datenblatt

Document Number: 320032-001 Mobile Intel® Atom™ Processor N270 Single Core Datasheet May 2008

Low Power Features 10 Datasheet 2 Low Power Features 2.1 Clock Control and Low-power States The processor supports low power states at the thr

Low Power Features Datasheet 11 Figure 1. Thread Low-power States Figure 2. Package Low-power States

Low Power Features 12 Datasheet Table 2. Coordination of Thread Low-power States at the Package Level Package State2 Thread State C0 C11 C2 C4

Low Power Features Datasheet 13 2.1.1.3 Thread C1/MWAIT Power-down State C1/MWAIT is a low-power state entered when the processor thread execut

Low Power Features 14 Datasheet termination resistors in this state. In addition, all other input pins on the FSB should be driven to the inacti

Low Power Features Datasheet 15 While in the Sleep state, the processor is capable of entering an even lower power state, the Deep Sleep state,

Low Power Features 16 Datasheet L2 cache has been reduced to zero ways and completely shut down. The following events occur when the processor e

Low Power Features Datasheet 17 2.3 Enhanced Intel SpeedStep® Technology The processor features Enhanced Intel SpeedStep Technology. Following

Low Power Features 18 Datasheet 2.4 Enhanced Low-Power States Enhanced low-power states (C1E, C2E, C4E) optimize for power by forcibly reducing

Low Power Features Datasheet 19 2.5 FSB Low Power Enhancements The processor incorporates FSB low power enhancements: • BPRI# control for addr

2 Datasheet INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTO

Electrical Specifications 20 Datasheet 3 Electrical Specifications 3.1 Power and Ground Pins For clean, on-chip power distribution, the proces

Electrical Specifications Datasheet 21 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VCC (V) 0 1 0 0 0 1 1 1.0625 0 1 0 0 1 0 0 1.0500 0 1 0 0 1 0 1 1.

Electrical Specifications 22 Datasheet VID6 VID5 VID4 VID3 VID2 VID1 VID0 VCC (V) 1 0 0 0 1 1 0 0.6250 1 0 0 0 1 1 1 0.6125 1 0 0 1 0 0 0 0.

Electrical Specifications Datasheet 23 3.4 Catastrophic Thermal Protection The processor supports the THERMTRIP# signal for catastrophic therma

Electrical Specifications 24 Datasheet 3.7 FSB Signal Groups To simplify the following discussion, the FSB signals have been combined into grou

Electrical Specifications Datasheet 25 Signal Group Type Signals1 Open Drain Output Synchronous to TCK TDO FSB Clock Clock BCLK [1:0] Power

Electrical Specifications 26 Datasheet Table 6. Processor Absolute Maximum Ratings Symbol Parameter Min Max Unit Notes1,5 TSTORAGE Processor S

Electrical Specifications Datasheet 27 Table 7. Voltage and Current Specifications for the Processors Symbol Parameter Min Typ Max Unit Notes13

Electrical Specifications 28 Datasheet impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise

Electrical Specifications Datasheet 29 Figure 4. Deeper Sleep VCC and ICC Processor Loadline Table 8. FSB Differential BCLK Specifications Sym

Datasheet 3 Contents 1 Introduction...6 1.1

Electrical Specifications 30 Datasheet Table 9. AGTL+ Signal Group DC Specifications Symbol Parameter Min Typ Max Unit Notes1 VCCP I/O Voltage

Electrical Specifications Datasheet 31 Table 10. Legacy CMOS Signal Group DC Specifications Symbol Parameter Min Typ Max Unit Notes1 VCCP I/O

Electrical Specifications 32 Datasheet Table 11. Open Drain Signal Group DC Specifications Symbol Parameter Min Typ Max Unit Notes1 VOH Outpu

Package Mechanical Specifications and Pin Information Datasheet 33 4 Package Mechanical Specifications and Pin Information This chapter provide

Package Mechanical Specifications and Pin Information 34 Datasheet 4.1.1 Package Mechanical Drawings Figure 5. Package Mechanical Drawing 4.2

Package Mechanical Specifications and Pin Information Datasheet 35 Figure 6. Pin-out Diagram (Top View, Left Side) 1 2 3 4 5 6 7 8 9101112131415

Package Mechanical Specifications and Pin Information 36 Datasheet Table 12. Pin-out Arranged by Signal Name Signal Name Ball # A [10]# M19 A

Package Mechanical Specifications and Pin Information Datasheet 37 Signal Name Ball # D [40]# G3 D [41]# H2 D [42]# N2 D [43]# L2 D [44]#

Package Mechanical Specifications and Pin Information 38 Datasheet Signal Name Ball # VCCPC63 F13 VCCPC64 F14 SLP# N18 SMI# U17 STPCLK# R16 TCK

Package Mechanical Specifications and Pin Information Datasheet 39 Signal Name Ball # VSS D21 VSS E3 VSS E6 VSS E7 VSS E8 VSS E15 VSS E16 VSS

4 Datasheet Figures Figure 1. Thread Low-power States ...11 Figure 2. Package L

Package Mechanical Specifications and Pin Information 40 Datasheet Signal Name Ball # VSS U19 VSS V1 VSS V4 VSS V6 VSS V7 VSS V8 VSS V13 VSS V1

Package Mechanical Specifications and Pin Information Datasheet 41 4.3 Signal Description Table 13. Signal Description Signal Name Type Descr

Package Mechanical Specifications and Pin Information 42 Datasheet Signal Name Type Description BPM [0]# O BPM [1]# I/O BPM [2]# O BPM [3]#

Package Mechanical Specifications and Pin Information Datasheet 43 Signal Name Type Description DBSY# I/O DBSY# (Data Bus Busy) is asserted by

Package Mechanical Specifications and Pin Information 44 Datasheet Signal Name Type Description DSTBP [3:0]# I/O Data strobe used to latch in

Package Mechanical Specifications and Pin Information Datasheet 45 Signal Name Type Description IERR# O IERR# (Internal Error) is asserted by

Package Mechanical Specifications and Pin Information 46 Datasheet Signal Name Type Description LOCK# I/O Lock# indicates to the system that a

Package Mechanical Specifications and Pin Information Datasheet 47 Signal Name Type Description RESET# I Asserting the RESET# signal resets th

Package Mechanical Specifications and Pin Information 48 Datasheet Signal Name Type Description TDO O TDO (Test Data Out) transfers serial tes

Package Mechanical Specifications and Pin Information Datasheet 49 Signal Name Type Description VCC_SENSE O VCCSENSE is an isolated low impeda

Datasheet 5 Revision History Document Number Revision Number Description Revision Date 320032 001 Initial release. May 2008 §

Thermal Specifications and Design Considerations 50 Datasheet 5 Thermal Specifications and Design Considerations The processor requires a therm

Thermal Specifications and Design Considerations Datasheet 51 The processor incorporates three methods of monitoring die temperature: the Digita

Thermal Specifications and Design Considerations 52 Datasheet Table 15. Thermal Diode Interface Signal Name Pin/Ball Number Signal Description

Thermal Specifications and Design Considerations Datasheet 53 5.2 Intel® Thermal Monitor The Intel Thermal Monitor helps control the processor

Thermal Specifications and Design Considerations 54 Datasheet limit and subsequently searches for the highest possible operating point. Please e

Thermal Specifications and Design Considerations Datasheet 55 Thermal Monitor feature. The Intel Thermal Monitor can be configured to generate a

Thermal Specifications and Design Considerations 56 Datasheet Note: The digital thermal sensor (DTS) accuracy is in the order of -5°C ~ +10°C a

Thermal Specifications and Design Considerations Datasheet 57 consumption. Bi-directional PROCHOT# can allow VR thermal designs to target maximu

Introduction 6 Datasheet 1 Introduction The Intel® Atom™ Processor N270 (code named Mobile Diamondville) is built on 45-nanometer process techn

Introduction Datasheet 7 1.2 Terminology Term Definition # A “#” symbol after a signal name refers to an active low signal, indicating a signa

Introduction 8 Datasheet Term Definition VCC,BOOT Default VCC Voltage for Initial Power Up. VCCP AGTL+ Termination Voltage. VCCA PLL Supply

Introduction Datasheet 9 1.3 References Material and concepts available in the following documents may be beneficial when reading this document