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Interfaces

22 Datasheet

The interface design was optimized for interfacing to Intel processor and chipset

components in both single processor and multiple processor environments. The single

wire interface provides low board routing overhead for the multiple load connections in

the congested routing area near the processor and chipset components. Bus speed,

error checking, and low protocol overhead provides adequate link bandwidth and

reliability to transfer critical device operating conditions and configuration information.

§ §

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 ... 115 116

LGA2011 Socket 1
Table of Contents 3
4 Datasheet 4
Datasheet 5 5
6 Datasheet 6
Revision History 7
1 Introduction 8
1.1 Processor Feature Details 9
1.2 Supported Technologies 10
1.3 Interfaces 10
1.3.2 PCI Express* 11
Transaction 12
1.4 Power Management Support 13
1.6 Package Summary 14
1.7 Terminology 14
1.8 Related Documents 16
2 Interfaces 18
2.2 PCI Express* Interface 19
2.2.1.1 Transaction Layer 20
2.2.1.2 Data Link Layer 20
2.2.1.3 Physical Layer 20
Interface 21
Interfaces 22
22 Datasheet 22
3 Technologies 23
3.1.2 Intel 24
VT-x Features 24
3.1.3 Intel 24
VT-d Objectives 24
3.1.3.1 Intel 25
VT-d Features Supported 25
3.2 Security Technologies 26
3.3 Intel 26
Technology) 26
3.4 Intel 27
Turbo Boost Technology 27
3.5 Enhanced Intel 27
SpeedStep 27
Technology 27
3.6 Intel 28
Datasheet 29 29
Technologies 29
4 Power Management 30
4.2.1 Enhanced Intel 33
4.2.2 Low-Power Idle States 34
4.2.4.1 Core C0 State 36
4.2.4.2 Core C1/C1E State 36
4.2.4.3 Core C3 State 36
4.2.4.4 Core C6 State 36
4.2.4.5 Core C7 State 36
4.2.4.6 Delayed Deep C-States 37
4.2.5.1 Package C0 State 38
4.2.5.2 Package C1/C1E State 39
4.2.5.3 Package C2 State 39
4.2.5.4 Package C3 State 39
4.2.5.5 Package C6 State 40
4.3.2.1 Self-Refresh Entry 41
4.3.2.2 Self-Refresh Exit 42
4.3.2.3 DLL and PLL Shutdown 42
5 Thermal Management 43
6 Signal Descriptions 44
Miscellaneous Signals 48
7 Electrical Specifications 52
BCLK{0/1}_DN) 53
7.1.5.1 PLL Power Supply 54
7.1.8.2 Decoupling Guidelines 55
Electrical Specifications 56
56 Datasheet 56
7.2 Signal Group Summary 59
7.5 DC Specifications 64
7.5.2.1 V 66
Overshoot Specifications 66
Unit Figure Notes 68
Specifications 69
Datasheet 71 71
8 Processor Land Listing 72
(Sheet 1 of 42) 73
(Sheet 2 of 42) 73
(Sheet 3 of 42) 74
(Sheet 4 of 42) 74
(Sheet 5 of 42) 75
(Sheet 6 of 42) 75
(Sheet 7 of 42) 76
(Sheet 8 of 42) 76
(Sheet 9 of 42) 77
(Sheet 10 of 42) 77
(Sheet 11 of 42) 78
(Sheet 12 of 42) 78
(Sheet 13 of 42) 79
(Sheet 14 of 42) 79
(Sheet 15 of 42) 80
(Sheet 16 of 42) 80
(Sheet 17 of 42) 81
(Sheet 18 of 42) 81
(Sheet 19 of 42) 82
(Sheet 20 of 42) 82
(Sheet 21 of 42) 83
(Sheet 22 of 42) 83
(Sheet 23 of 42) 84
(Sheet 24 of 42) 84
(Sheet 25 of 42) 85
(Sheet 26 of 42) 85
(Sheet 27 of 42) 86
(Sheet 28 of 42) 86
(Sheet 29 of 42) 87
(Sheet 30 of 42) 87
(Sheet 31 of 42) 88
(Sheet 32 of 42) 88
(Sheet 33 of 42) 89
(Sheet 34 of 42) 89
(Sheet 35 of 42) 90
(Sheet 36 of 42) 90
(Sheet 37 of 42) 91
(Sheet 38 of 42) 91
(Sheet 39 of 42) 92
(Sheet 40 of 42) 92
(Sheet 41 of 42) 93
(Sheet 42 of 42) 93
Number (Sheet 1 of 42) 94
Number (Sheet 2 of 42) 94
Number (Sheet 3 of 42) 95
Number (Sheet 4 of 42) 95
Number (Sheet 5 of 42) 96
Number (Sheet 6 of 42) 96
Number (Sheet 7 of 42) 97
Number (Sheet 8 of 42) 97
Number (Sheet 9 of 42) 98
Number (Sheet 10 of 98
Number (Sheet 11 of 99
Number (Sheet 12 of 99
Table 8-2. Land List by Land 100
Number (Sheet 13 of 100
Number (Sheet 14 of 100
Number (Sheet 15 of 101
Number (Sheet 16 of 101
Number (Sheet 18 of 102
Number (Sheet 17 of 102
Number (Sheet 19 of 103
Number (Sheet 20 of 103
Number (Sheet 21 of 104
Number (Sheet 22 of 104
Number (Sheet 23 of 105
Number (Sheet 24 of 105
Number (Sheet 25 of 106
Number (Sheet 26 of 106
Number (Sheet 27 of 107
Number (Sheet 28 of 107
Number (Sheet 29 of 108
Number (Sheet 30 of 108
Number (Sheet 31 of 109
Number (Sheet 32 of 109
Number (Sheet 33 of 110
Number (Sheet 34 of 110
Number (Sheet 35 of 111
Number (Sheet 36 of 111
Number (Sheet 37 of 112
Number (Sheet 38 of 112
Number (Sheet 39 of 113
Number (Sheet 40 of 113
Number (Sheet 41 of 114
Number (Sheet 42 of 114
9 Package Mechanical 115
10.1 Introduction 116
10.2 Boxed Processor Contents 116

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