Intel LE80538UE0092M Datenblatt PDF herunterladen (Seite 52)

Specification Clarifications

52 Specification Update

Specification Clarifications

AE2 Enhanced Cache Error Reporting for D0 Stepping

Beginning with the D0 stepping, enhanced cache error reporting - as described in

Section 14.4 of the

Intel® 64 and IA-32 Architectures Software Developer’s Manual

(SDM), Volume 3A: System Programming Guide – is supported by the processor. Older

steppings use the original cache error reporting scheme. Please see the SDM, Volume

3A, for more details.

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Intel LE80538UE0092M Datenblatt Seite 52