Intel CM8063701219000 Datenblatt PDF herunterladen (Seite 260)

Processor Configuration Registers

260 Datasheet, Volume 2

2.19.6 GT_PERF_STATUS—GT Performance Status Register

P-state encoding for the Secondary Power Plane's current PLL frequency and the

current VID.

2.19.7 RP_STATE_CAP—RP State Capability Register

This register contains the maximum base frequency capability for the Integrated

Graphics Engine (GT).

B/D/F/Type: 0/0/0/MCHBAR PCU

Address Offset: 5948-594Bh

Default Value: 0000_0000h

Access: RO-V

Size: 32 bits

BIOS Optimal Default 0000h

Bit Attr

Reset

Value

RST/PWR Description

31:16 RO 0h Reserved

15:8 RO-V 00h Uncore

RP-State Ratio (RP_STATE_RATIO)

Ratio of the current RP-state.

7:0 RO-V 00h Uncore

RP-State VID (RP_STATE_VID)

VID of the current RP-state.

B/D/F/Type: 0/0/0/MCHBAR PCU

Address Offset: 5998-599Bh

Default Value: 0000_0000h

Access: RO-FW

Size: 32 bits

BIOS Optimal Default: 00h

Bit Attr

Reset

Value

RST/PWR Description

31:24 RO 0h Reserved

23:16 RO-FW 00h Uncore

RPN Capability (RPN_CAP)

This field indicates the maximum RPN base frequency capability

for the Integrated graphics Engine (GT). Values are in units of

100 MHz.

15:8 RO-FW 00h Uncore

RP1 Capability (RP1_CAP)

This field indicates the maximum RP1 base frequency capability

for the Integrated graphics Engine (GT). Values are in units of

100 MHz.

7:0 RO-FW 00h Uncore

RP0 Capability (RP0_CAP)

This field indicates the maximum RP0 base frequency capability

for the Integrated graphics Engine (GT). Values are in units of

100 MHz.

1 2 ... 255 256 257 258 259 260 261 262 263 264 265 ... 295 296

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