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6/26/97 9:16 AM 24318504.DOC

INTEL CONFIDENTIAL

(until publication date)

June 1997 Order Number: 243185.004

Maximum Operating Frequency 166 MHz 200 MHz 233 MHz

iCOMP

Index 2.0 Rating 160 182 203

NOTE: Contact Intel Corporation for more information about iCOMP

Index 2.0 ratings.

Support for MMX™ Technology

Compatible with Large Software Base

 MS-DOS*, Windows*, OS/2*, UNIX*

32-Bit Processor with 64-Bit Data Bus

Superscalar Architecture

 Enhanced Pipelines

 Two Pipelined Integer Units

Capable of Two Instructions per

Clock

 Pipelined MMX Unit

 Pipelined Floating-Point Unit

Separate Code and Data Caches

 16-Kbyte Code, 16-Kbyte Write

Back Data

 MESI Cache Protocol

Advanced Design Features

 Deeper Write Buffers

 Enhanced Branch Prediction

Feature

 Virtual Mode Extensions

Enhanced CMOS Silicon Technology

4-Mbyte Pages for Increased TLB Hit

Rate

IEEE 1149.1 Boundary Scan

Dual Processing Configuration

Internal Error Detection Features

Multi-Processor Support

 Multiprocessor Instructions

 Support for Second Level Cache

On-Chip Local APIC Controller

 MP Interrupt Management

 8259 Compatible

Power Management Features

 System Management Mode

 Clock Control

Fractional Bus Operation

 233 MHz Core/66 MHz Bus

 200 MHz Core/66 MHz Bus

 166 MHz Core/66 MHz Bus

The Pentium

processor with MMX™ technology extends the Pentium processor family, providing performance

needed for mainstream desktop applications as well as for workstations. The Pentium processor with MMX

technology is compatible with the entire installed base of applications for MS-DOS*, Windows*, OS/2* and

UNIX*. The Pentium processor with MMX technology is the first microprocessor to support Intel MMX

technology. Furthermore, the Pentium processor with MMX technology superscalar architecture can execute two

instructions per clock cycle. Enhanced branch prediction and separate caches also increase performance. The

pipelined floating-point unit delivers workstation level performance. Separate code and data caches reduce

cache conflicts while remaining software transparent. The Pentium processor with MMX technology has

4.5 million transistors and is built on Intel's enhanced CMOS silicon technology.

The Pentium processor with MMX technology may contain design defects or errors known as errata that may

cause the product to deviate from published specifications. Current characterized errata are available on

request.

PENTIUM® PROCESSOR WITH

MMX™ TECHNOLOGY

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E 6/26/97 9:16 AM 24318504.DOCINTEL CONFIDENTIAL(until publication date)June 1997 Order Number: 243185.004Maximum Operating Frequency 166 MHz 200 M

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E105/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)INC INC INC FLUSH# VCC2 VCC3 A10

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY115/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)2.1.2. PIN CROSS-REFERENCE TABLE

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E125/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 1. Pin Cross-Reference by

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY135/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 1. Pin Cross-Reference by

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E145/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)The # symbol at the end of a sign

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY155/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E165/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY175/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E185/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY195/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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6/26/97 9:16 AM 24318504.DOCINTEL CONFIDENTIAL(until publication date)Information in this document is provided in connection with Intel products. N

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E205/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY215/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E225/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY235/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 2. Quick Pin Reference (Co

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E245/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)2.4. Pin Reference TablesTable 4.

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY255/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 5. Input PinsName Active L

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E265/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 6. Input/Output Pins (1)N

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY275/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)2.5. Pin Grouping According to Fu

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E285/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)3.0. ELECTRICAL SPECIFICATIONSThi

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY295/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)specified at different voltages.

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY35/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)CONTENTSPAGE PAGE1.0. MICROPROCESS

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E305/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)3.1.2.4. Private BusWhen two Pent

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY315/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)3.3. DC SpecificationsTable 10 a

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E325/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)NOTES:1. This value should be use

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY335/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 14. Input and Output Chara

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E345/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)3.4. AC SpecificationsThe AC spec

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY355/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 15. Pentium® Processor wit

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E365/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 15. Pentium® Processor wit

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY375/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 15. Pentium® Processor wit

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E385/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 15. Pentium® Processor wit

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY395/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 16. Pentium® Processor wit

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E45/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)1.0. MICROPROCESSORARCHITECTURE OV

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E405/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)11. This is a flight time specifi

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY415/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)SignalVALID1.5V1.5VT max.xT m

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E425/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Tt = t40, Tu = t41, Tv = t37, T w

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY435/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Figure 11. 50 Percent VCC Measur

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E445/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)1.65REF.LSEATINGPLANEAA1A2REF.2.2

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY455/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Figure 13. PPGA Package Dimensio

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E465/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 19. PPGA Package Dimension

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY475/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)PPGASPGAFigure 14. Technique for

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E485/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 20. Thermal Resistance for

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY495/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)0123456789100.2 0.4 0.6 0.8 1.0 1

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY55/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)For a more detailed description of

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E505/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)Table 21. Thermal Resistances fo

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY515/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)0123456789100.2 0.4 0.6 0.8 1.0 1

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E65/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)BranchTargetBufferCode Cache 16 K

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY75/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)easy system design. Through a priv

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PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY E85/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)The integration of the MMX pipelin

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E PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY95/23/97 10:47 AM 24318502.DOCINTEL CONFIDENTIAL(until publication date)2.0. PINOUT2.1. Pinout and Pin Des

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