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Electrical Specifications

Datasheet 41

Figure 7. Deeper Sleep V

and I

Loadline

10 mV = Ripple for

PSI# Asserted

Slope = -5.7 mV/A at package

VCC_SENSE, VSS_SENSE pins.

Differential Remote Sense required.

CC_CORE

(V)

CC_CORE

(A)

CC_CORE, DC

Min

(Deeper Sleep)

CC_CORE

Min

(Deeper Sleep)

±V

CC_CORE

Tolerance

= VR ST Pt Error 1/

CC_CORE

Nom

(Deeper Sleep)

CC_CORE

Max

(Deeper Sleep)

CC_CORE, DC

Max

(Deeper Sleep)

CC_CORE

Max

(Deeper Sleep)

Note 1/ Deeper Sleep VCC_CORE Set Point Error Tolerance is per below:

Tolerance – PSI# Ripple

--------------------------------

± [(VID*1.5%) – 3 mV]

± (11.5 mV) – 3 mV]

± (25 mV) – 3 mV]

CC_CORE

VID Voltage Range

----------------------------------------

CC_CORE

> 0.7500 V

0.7500 V ≤ V

CC_CORE

≤ 0.5000 V

0.5000 V < V

CC_CORE

≤ 0.4125 V

1 2 ... 36 37 38 39 40 41 42 43 44 45 46 ... 72 73

Atom™ Processor Z5xx 1
Series 1
2 Datasheet 2
Contents 3
Figures 4
Revision History 5
6 Datasheet 6
1 Introduction 7
8 Datasheet 8
1.3 Terminology 9
1.4 References 11
Introduction 12
12 Datasheet 12
2 Low Power Features 13
Low Power Features 14
14 Datasheet 14
2.1.1.2 C2 State 16
2.1.1.3 C4 State 17
2.1.1.3.2 Deep Sleep State 18
2.1.1.4 C6 State 19
Thread 1 20
Thread 0 20
Datasheet 21 21
2.2 Dynamic Cache Sizing 22
Datasheet 23 23
24 Datasheet 24
2.5.1 CMOS Front Side Bus 25
(Intel® BPT) 26
3 Electrical Specifications 27
3.3 Decoupling Guidelines 28
3.9 FSB Signal Groups 31
3.11 Maximum Ratings 33
CC,BOOT 34
Figure 6. Active V 40
Loadline 40
Figure 7. Deeper Sleep V 41
Electrical Specifications 45
Datasheet 45 45
46 Datasheet 46
4 Package Mechanical 47
Specifications and Pin 47
Information 47
48 Datasheet 48
4.3 Signal Description 56
must be tied directly to V 61
64 Datasheet 64
Design Considerations 65
5.1 for more details 66
5.1 Thermal Specifications 68
= Tmeasured * (1 – n 69
70 Datasheet 70
Datasheet 71 71
5.1.5 PROCHOT# Signal Pin 72
Datasheet 73 73

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