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Summary Tables of Changes

28 Specification Update

Number

Stepping

Plans

ERRATA

B-2

L-2

A-1

AH118

No Fix

NMIs may not be blocked by a VM-Entry failure.

AH119

No Fix

Benign Exception after a Double Fault May Not Cause a

Triple Fault Shutdown Problem

AH120

No Fix

IA32_MC1_STATUS MSR Bit[60] Does Not Reflect Machine

Check Error Reporting Enable Correctly

AH121

No Fix

Corruption of CS Segment Register During RSM While

Transitioning From Real Mode to Protected Mode

AH122

No Fix

FP Data Operand Pointer May Be Incorrectly Calculated

After an FP Access Which Wraps a 4-Gbyte Boundary in

Code That Uses 32-Bit Address Size in 64-bit Mode

1 2 ... 23 24 25 26 27 28 29 30 31 32 33 ... 96 97

Including Intel 1
Specification Update 2
Contents 3
Revision History 4
6 Specification Update 6
Preface 7
Nomenclature 8
Specification Update 9 9
Identification Information 10
Table 3. Intel 13
945 Express Chipset Family 13
Component Markings 13
14 Specification Update 14
Table 2. Intel 14
965 Express Chipset Family 14
16 Specification Update 16
Table 1. Intel 17
Celeron 17
18 Specification Update 18
Summary Tables of Changes 19
Specification Update 21 21
Errata for Intel 22
24 Specification Update 24
26 Specification Update 26
28 Specification Update 28
Based on Mobile Intel 29
30 Specification Update 30
32 Specification Update 32
34 Specification Update 34
38 Specification Update 38
May Terminate Early 38
40 Specification Update 40
Specification Update 43 43
Specification Update 45 45
Not Be Accurate 46
Specification 47
Address Translations 47
Specification Update 49 49
Specification Update 51 51
Invocation 52
Specification Update 53 53
Be Incorrect 54
Specification Update 55 55
Specification Update 57 57
Accurate 59
Specification Update 61 61
Specification Update 63 63
Shootdown 65
Specification Update 67 67
Address 68
IA32_DEBUGCTL[12] Is Set 69
Software Interrupts 71
Specification Update 73 73
Specification Update 75 75
Specification Update 77 77
Specification Update 79 79
Instructions as Branches 81
Signaled 82
Information 83
AH108. Overlap of an Intel 84
VM Exit 84
Count Some Transitions 85
Memory-Ordering Violations 86
Specification Update 87 87
Shutdown 88
Specification Update 89 89
90 Specification Update 90
Erratum Affecting Only Intel 91
Core™2 Duo Mobile 91
Processors on Mobile Intel 91
Be Able to Enter Intel 92
Enhanced Deeper Sleep 92
AH6P Activation of Intel 93
Dynamic 93
Specification Changes 94
Specification Update 95 95
Specification Clarifications 96
Documentation Changes 97

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